Semiconductor Engineering

The PCB Engineer’s Guide To Successful DDR Bus Design

This paper tackles the critical signal integrity concerns encountered when designing, simulating, and analyzing DDR buses. The first section describes DDR bus design challenges that can be ...
EDN

Thick-film resistor nets terminate DDR DRAM data buses

Elkhart, Ind. – CTS Corp. is about to launch a ceramic thick-film resistor network family that can terminate double-data-rate DRAMs for 1-GHz-and-up computer and communications data buses within ...
EDN

Tektronix enhances DDR test and validation portfolio with two new additions

Tektronix today announced enhancements and upgrades to its DDR test and validation portfolio. New interposers being introduced for the Tektronix TLA7000 Series logic analyzers provide engineers with ...
Ars Technica

DDR 133 vs 200 Mhz FSB

Would a 200 Mhz FSB be faster (move-more-data) than a double-pumped 133 Mhz DDR bus. The old info that I had (I was corrected as to DDR speed issues in MacAch not long ago) indicated that a double ...
Electronic Design

DDR Bus Termination Regulator from Diodes Incorporated Handles Upgrades to DDR4

Diodes Incorporated has introduced a low-dropout linear regulator capable of generating the bus termination voltages needed by DDR 2, 3, 3L and 4 SDRAM memory systems. Diodes Incorporated has ...
Electronic Design

Probing Problems With DDR SDRAM

Coming soon to a PC near you is double-data-rate (DDR) SDRAM. This low-cost, high-performance technology targets both PC memory buses and embedded designs like high-end graphics systems. So how do you ...
Business Wire

DDR4 Memory Monitoring Tool Sheds Traditional Approach by using Thousands of Counters

BEDFORD, N.H.--(BUSINESS WIRE)--FuturePlus Systems today is introducing the FS2800 DDR Detective ®, the most comprehensive and cost effective DDR4, DDR3 and LPDDR2/3 validation and debug tool ...
Mitteldeutscher Rundfunk

DDR-BusMit dem Ikarus durch Bautzen: "Da kommen alte Erinnerungen auf"

Der Verkehrsverbund ZVON feiert sein dreißigjähriges Bestehen. Deshalb gibt es diese und nächste Woche die Gelegenheit mit historischen Fahrzeugen die Oberlausitz zu erkunden. Mit dabei ist in Bautzen ...
Leipziger Volkszeitung

Geschichten aus dem DDR-Bus: Robur rollt in Bad Lausick

Von außen sehen sie aus wie früher. Was die Bad Lausicker Cathrin und Andreas Ludwig aus dem Innenleben des Robur (Baujahr 1978) und des Fleischerbusses (Baujahr 1976) gemacht haben, überrascht jede ...
Golem

Den echten DDR-Bus identifizieren

Der Speicherbaustein sitzt über dem FPGA auf der Platine, so dass die Pin-Belegung auch hier sinnvoll ist. SSTL kommt erneut als Verbindungsstandard zum Einsatz, der VREF-Pin wird also auch hier mit 0 ...
Ars Technica

DDR 133 vs 200 Mhz FSB [copied from Mac Achaia]

Would a 200 Mhz FSB be faster (move-more-data) than a double-pumped 133 Mhz DDR bus. The old info that I had (I was corrected as to DDR speed issues in MacAch not long ago) indicated that a double ...